On 21 November 2025, IIT-Patna signed a term-sheet that sounded almost fictional for a land-locked state famous for its rustic charm: a 28-nanometre research fab, a 150-mm gallium-nitride pilot line, and a chip-packaging facility—all inside a 52-acre green-field campus at Bihta, 42 minutes from Patna airport. The price tag: ₹1,800 crore over five years, 55 % front-loaded by the state government, 30 % by Tata Power Solar, and 15 % by a consortium of VLSI design start-ups incubated inside the institute. The project, branded “Bihar Semiconductor Mission” (BSM), aims to produce India’s first locally designed microcontroller for smart metres by 2027 and a lithium-ion battery-management chip for electric two-wheelers by 2028. If the timeline holds, Bihar will join only a handful of political jurisdictions—Taiwan, South Korea, Israel, the United States and parts of Europe—that can claim end-to-end competence from architecture to tape-out without relying on Chinese fabs.
The choice of 28 nm is deliberate. While the world races toward 3 nm process nodes for flagship smartphones, 28 nm remains the work-horse for automotive, power and industrial applications, segments India imports worth $7.8 billion a year. A modern 28 nm line needs 1,200 litres of ultra-pure water per minute, a power load of 42 MW and a vibration-free floor that settles less than 2 microns per annum. Bihar’s advantage is the Sone river, which carries 440 million cubic metres of water annually and already feeds the 2×660 MW NTPC Barh super-critical thermal plant whose steady 40 MW baseline can be wheeled to the fab at industrial tariff. Vibration risk is mitigated by the rocky gangetic substratum at Bihta, the same geology that allowed the British to build the grand chord rail-line in 1901 without a single tunnel. The institute’s earthquake data shows a peak ground acceleration of 0.08 g, one-fourth of the threshold beyond which fab-tools require seismic isolation.
Clean-room construction will begin in April 2026 with a 46,000-square-foot class-100 zone, expandable to 88,000 square feet if demand materialises. The tool list reads like a geeks’ wish-list: ASML XT-1060 scanners for 193-nm immersion lithography, Applied Materials Centura for high-k metal gate, and Lam Research Versa for epi-stack. Because these tools are on the US Commerce Department’s export-control list, BSM has applied for a validated end-user licence under the Indo-US Strategic Partnership, citing the fab’s explicit research—not weapons—mandate. Tata Power Solar will co-develop a 75 MW captive solar farm with battery storage to guarantee 99.98 % uptime, meeting the fab’s uninterruptible-power specification of less than four milliseconds outage. In return, Tata gets a 26 % equity stake and right of first refusal to manufacture solar-inverter chips on the line.
Talent is the biggest variable. India produces 25,000 VLSI engineers a year, but 18,000 emigrate within 36 months. BSM’s answer is a twin-track pipeline: a four-year B.Tech minor in microelectronics that IIT-Patna will launch in 2026 with an intake of 120, and a two-year M.Tech in semiconductor science starting 2027. Every student gets 1,200 hours of clean-room internship, a stipend of ₹18,000 a month, and a post-study bond of three years service inside BSM, failing which the student repays ₹18 lakh—effectively a retention insurance. A parallel “return-to-home” fellowship offers NRI engineers with 5-10 years of fab experience a tax-free grant of ₹1 crore spread over three years plus a custom-built villa on campus. Within six weeks of the announcement, 112 applications arrived from engineers working at Intel Oregon, GlobalFoundries Singapore and Samsung Seoul.
The business model is fabless-plus-foundry-lite. BSM will not mass-produce 100 million chips a year; instead it aims at 50,000 wafer starts per month, enough to validate designs that can later be scaled in commercial fabs overseas. Revenue will come from three streams: 45 % from design-services for Indian start-ups, 35 % from government-mandated chips such as smart-metre controllers, and 20 % from IP licensing. A back-of-the-envelope calculation projects break-even in year six with an annual turnover of ₹2,400 crore and an operating margin of 22 %. The state’s pay-back is calculated at 14 years, but the bigger prize is employment: 1,800 direct jobs inside the fab and 7,000 indirect jobs in packaging, testing and logistics. More importantly, every job will be higher than the ₹6-lakh annual salary threshold, creating a consumption class Patna has never seen.
Geopolitics is the elephant in the clean-room. China controls 38 % of global wafer fab capacity and 75 % of mature-node production. The 2022 US CHIPS Act and the subsequent Japanese-European subsidies have made it clear that nations without domestic silicon will be at the mercy of those with it. BSM positions India—and specifically Bihar—as a hedge against future choke-points. The defence angle is carefully under-played, but officials admit that secure micro-controllers for battlefield communication were part of the initial pitch to the Union cabinet. A second-phase expansion to 14 nm is already pencilled in, contingent on securing a high-NA EUV scanner that costs ₹3,400 crore and needs an airstrip capable of landing an Antonov cargo plane. Patna airport’s runway is being extended to 3,600 metres, completion date 2028.
Sceptics question the wisdom of locating a water-guzzling fab in a monsoon-dependent state. Historical data, however, shows that the Sone river’s lowest discharge—340 cubic metres per second in June—is still 2.5 times the fab’s peak requirement. A closed-loop recycling plant will recover 85 % of water, while a tertiary membrane bio-reactor will treat municipal waste-water as a back-up source. The bigger risk is capital over-run; India’s only operational fab—SCL Mohali—took nine years instead of four and cost 240 % of the original estimate. BSM has ring-fenced that contingency through a cost-plus contract with Larsen & Toubro, which absorbs any escalation beyond 15 % in exchange for a 7 % management fee. If the first wafers roll out by March 2028, Bihar will have pulled off the ultimate Make-in-India coup: a heartland state better known for its intellectual labour exporting not just engineers but engineered silicon.